1. Field of the Invention
The present invention relates to a semiconductor memory device having a redundancy configuration such as a RAM. In particular, it relates to a read circuit for reading an address of a defective memory cell which is replaced with a redundancy memory cell.
2. Description of the Related Art
Recently, the capacity of a semiconductor memory device has tended to become larger and larger, but this increased capacity is accompanied by a higher probability of the occurrence of partial defects in the memory cells on a chip. Accordingly, a method whereby a defective memory is replaced with a redundant memory cell is carried out, to improve the manufacturing yield. This method is particularly utilized for MOS memory devices in which the enlargement of the capacity has gone a step further. This method, however, has not been widely utilized for bipolar-transistor type memory devices. Nevertheless, the necessity to adopt the redundant memory cell method has increased as the enlargement of the capacity in the bipolar-transistor memory device has progressed.
A semiconductor memory device having the redundancy configuration includes a Programmable Read Only Memory (PROM) which stores an address of the defective memory cell, a comparison circuit which compares an address signal input to the memory device with the content of the PROM, and a redundant memory cell which stores input data in place of the defective memory cell in response to a coincidence between signals determined by the comparison circuit.
The address of the defective memory cell is written into the PROM when the defective memory cell is found by a test procedure during the process of manufacturing the memory device.
As described above, the address of the defective memory cell is written into the PROM during the manufacture of the device. But, the content of the PROM often must be read out after manufacture of the memory device is completed to confirm that the redundant memory cell address was correctly written into the PROM, or whether the content written into the PROM has been changed due to heat engendered during the manufacturing process after a writing operation or a reliability test of the memory device.
It is impossible, however, to read out the content of the PROM by placing a probe in contact with the output terminal thereof, since the IC chip has a very high integration degree and therefore, a very small configuration. It is possible to form pads connected to output terminals of the PROM around the memory chip so as to read out the content of the PROM by placing the probe in contact with the pads. This method, however, involves the necessity of allowing space in which the pads can be formed, which reduces the integration degree of the IC.
In general, a large capacity memory device has a large number of address bits, and therefore, if exclusive pads or pins are needed for reading the defective cell address, the number of pads or pins must be the same as the number of input address bits. In practice, it is impossible to provide such a large number of exclusive pads or pins in the memory device. Further, after the chip has been housed in a package, it is impossible to carry out a reading operation.